Difference between revisions of "The Snickerdoodle Book/Appendices"

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=== Appendix A. High-Level Block Diagram ===
 
=== Appendix A. High-Level Block Diagram ===
For more details see Appendix A [https://cdn.hackaday.io/files/7799333672416/snickerdoodle-book.pdf here].
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For more details see Appendix A [[The_Snickerdoodle_Book_Original|here]].
  
 
=== Appendix B. Connectors ===
 
=== Appendix B. Connectors ===
For more details see Appendix B  [https://cdn.hackaday.io/files/7799333672416/snickerdoodle-book.pdf here].
 
  
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==== FPGA Connectors ====
  
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[[File:JA1ConnectorPins.png|center|thumb|Figure B.1: FPGA Connector JA1]]
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[[File:JA2ConnectorPins.png|center|thumb|Figure B.2: FPGA Connector JA2]]
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[[File:JB1ConnectorPins.png|center|thumb|Figure B.3: FPGA Connector JB1]]
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[[File:JB2ConnectorPins.png|center|thumb|Figure B.4: FPGA Connector JB2]]
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[[File:JC1ConnectorPins.png|center|thumb|Figure B.5: FPGA Connector JC1 (black only)]]
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==== Processor Subsystem Connector ====
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[[File:J3ConnectorPins.png|center|thumb|Figure B.6: PS Connector J3]]
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The Processor Subsystem "Multiplexed Input/Output (MIO)" pins can be found on Connector J3
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==== Programming and Power Connector ====
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[[File:J2ConnectorPins.png|center|thumb|Figure B.7: PS Connector J2]]
  
 
=== Appendix C. wpa_supplicant.conf Network Configurations ===
 
=== Appendix C. wpa_supplicant.conf Network Configurations ===
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examples and helpful resources for further reading.
 
examples and helpful resources for further reading.
  
For more details see Appendix C  [https://cdn.hackaday.io/files/7799333672416/snickerdoodle-book.pdf here].
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For more details see Appendix C  [[The_Snickerdoodle_Book_Original|here]].
  
 
=== Appendix D. wpa_cli Network Configurations ===
 
=== Appendix D. wpa_cli Network Configurations ===
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sections.
 
sections.
  
For more details see Appendix D  [https://cdn.hackaday.io/files/7799333672416/snickerdoodle-book.pdf here].
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For more details see Appendix D  [[The_Snickerdoodle_Book_Original|here]].

Latest revision as of 19:41, 28 February 2021

Appendices

Appendix A. High-Level Block Diagram

For more details see Appendix A here.

Appendix B. Connectors

FPGA Connectors

Figure B.1: FPGA Connector JA1
Figure B.2: FPGA Connector JA2
Figure B.3: FPGA Connector JB1
Figure B.4: FPGA Connector JB2
Figure B.5: FPGA Connector JC1 (black only)


Processor Subsystem Connector

Figure B.6: PS Connector J3

The Processor Subsystem "Multiplexed Input/Output (MIO)" pins can be found on Connector J3

Programming and Power Connector

Figure B.7: PS Connector J2

Appendix C. wpa_supplicant.conf Network Configurations

This appendix contains a set of example network configurations for wpa_supplicant.conf with various security types. Common network security types have been chosen to be included here, however, they are not the only security schemes that are possible. The wpa_supplicant man page contains some additional examples and helpful resources for further reading.

For more details see Appendix C here.

Appendix D. wpa_cli Network Configurations

This appendix contains sets of commands used to configure network settings using wpa_cli. Each of the commands are variants of the set_network command and should be preceded by commands required to remove or add networks to the network list and followed by commands used to check the status of and finalize the connection, as described in the previous sections.

For more details see Appendix D here.