PiSmasher

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Dual Ethernet

RGMII

#-------------------------------------------------------------------------------
# Ethernet 0
#-------------------------------------------------------------------------------
# Clock
set_property PACKAGE_PIN L16 [get_ports ETH0_CLK125];           # JA2.35
set_property IOSTANDARD LVCMOS33 [get_ports ETH0_CLK125];

create_clock -add -period 8.000 -name eth0_clk125 [get_ports ETH0_CLK125];

# MDIO
set_property PACKAGE_PIN U10 [get_ports ETH0_MDIO_mdc];         # JC1.6 
set_property PACKAGE_PIN T9 [get_ports ETH0_MDIO_mdio_io];      # JC1.8

set_property IOSTANDARD LVCMOS33 [get_ports [list ETH0_MDIO_mdc ETH0_MDIO_mdio_io]];

# RGMII
set_property PACKAGE_PIN V15 [get_ports {ETH0_RGMII_rd[0]}];    # JB1.32
set_property PACKAGE_PIN W15 [get_ports {ETH0_RGMII_rd[1]}];    # JB1.30
set_property PACKAGE_PIN Y16 [get_ports {ETH0_RGMII_rd[2]}];    # JB1.26
set_property PACKAGE_PIN Y17 [get_ports {ETH0_RGMII_rd[3]}];    # JB1.24
set_property PACKAGE_PIN U19 [get_ports ETH0_RGMII_rx_ctl];     # JB1.36
set_property PACKAGE_PIN U18 [get_ports ETH0_RGMII_rxc];        # JB1.38

set_property IOSTANDARD LVCMOS33 [get_ports [list {ETH0_RGMII_rd[*]} ETH0_RGMII_rx_ctl ETH0_RGMII_rxc]];

create_clock -add -period 8.000 -name eth0_rgmii_rxclk [get_ports ETH0_RGMII_rxc];

set_property PACKAGE_PIN V12 [get_ports {ETH0_RGMII_td[0]}];    # JB1.14
set_property PACKAGE_PIN W13 [get_ports {ETH0_RGMII_td[1]}];    # JB1.12
set_property PACKAGE_PIN T12 [get_ports {ETH0_RGMII_td[2]}];    # JB1.8
set_property PACKAGE_PIN U12 [get_ports {ETH0_RGMII_td[3]}];    # JB1.6
set_property PACKAGE_PIN T15 [get_ports ETH0_RGMII_tx_ctl];     # JB1.18
set_property PACKAGE_PIN U13 [get_ports ETH0_RGMII_txc];        # JB1.17

set_property IOSTANDARD LVCMOS33 [get_ports [list {ETH0_RGMII_td[*]} ETH0_RGMII_tx_ctl ETH0_RGMII_txc]];
set_property SLEW FAST [get_ports [list {ETH0_RGMII_td[*]} ETH0_RGMII_tx_ctl ETH0_RGMII_txc]];


#-------------------------------------------------------------------------------
# Ethernet 1
#-------------------------------------------------------------------------------
# Clock
set_property PACKAGE_PIN K17 [get_ports ETH1_CLK125];           # JA2.38
set_property IOSTANDARD LVCMOS33 [get_ports ETH1_CLK125];

create_clock -add -period 8.000 -name eth1_clk125 [get_ports ETH1_CLK125];

# MDIO
set_property PACKAGE_PIN V7 [get_ports ETH1_MDIO_mdc];          # JC1.7
set_property PACKAGE_PIN U7 [get_ports ETH1_MDIO_mdio_io];      # JC1.5

set_property IOSTANDARD LVCMOS33 [get_ports [list ETH1_MDIO_mdc ETH1_MDIO_mdio_io]];

# RGMII
set_property PACKAGE_PIN Y14 [get_ports {ETH1_RGMII_rd[0]}];    # JB1.31
set_property PACKAGE_PIN W14 [get_ports {ETH1_RGMII_rd[1]}];    # JB1.29
set_property PACKAGE_PIN U17 [get_ports {ETH1_RGMII_rd[2]}];    # JB1.25
set_property PACKAGE_PIN T16 [get_ports {ETH1_RGMII_rd[3]}];    # JB1.23
set_property PACKAGE_PIN U15 [get_ports ETH1_RGMII_rx_ctl];     # JB1.37
set_property PACKAGE_PIN U14 [get_ports ETH1_RGMII_rxc];        # JB1.35

set_property IOSTANDARD LVCMOS33 [get_ports [list {ETH1_RGMII_rd[*]} ETH1_RGMII_rx_ctl ETH1_RGMII_rxc]];

create_clock -add -period 8.000 -name eth1_rgmii_rxclk [get_ports ETH1_RGMII_rxc];

set_property PACKAGE_PIN R14 [get_ports {ETH1_RGMII_td[0]}];    # JB1.13
set_property PACKAGE_PIN P14 [get_ports {ETH1_RGMII_td[1]}];    # JB1.11
set_property PACKAGE_PIN T10 [get_ports {ETH1_RGMII_td[2]}];    # JB1.7
set_property PACKAGE_PIN T11 [get_ports {ETH1_RGMII_td[3]}];    # JB1.5
set_property PACKAGE_PIN T14 [get_ports ETH1_RGMII_tx_ctl];     # JB1.20
set_property PACKAGE_PIN V13 [get_ports ETH1_RGMII_txc];        # JB1.19

set_property IOSTANDARD LVCMOS33 [get_ports [list {ETH1_RGMII_td[*]} ETH1_RGMII_tx_ctl ETH1_RGMII_txc]];
set_property SLEW FAST [get_ports [list {ETH1_RGMII_td[*]} ETH1_RGMII_tx_ctl ETH1_RGMII_txc]];


Device Tree

&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";

	eth_phy0: ethernet-phy@0 {
		reg = <0>;
		device_type = "ethernet-phy";
	};

	gmii2rgmii0: gmiitorgmii@8 {
		compatible = "xlnx,gmii-to-rgmii-1.0";
		reg = <8>;
		phy-handle = <&eth_phy0>;
	};
};

&gem1 {
	status = "okay";
	phy-mode = "rgmii-id";

	eth_phy1: ethernet-phy@1 {
		reg = <1>;
		device_type = "ethernet-phy";
	};

	gmii2rgmii1: gmiitorgmii@9 {
		compatible = "xlnx,gmii-to-rgmii-1.0";
		reg = <9>;
		phy-handle = <&eth_phy1>;
	};
};


eth0      Link encap:Ethernet  HWaddr 00:0a:35:00:01:22  
          inet addr:10.0.111.130  Bcast:10.0.111.255  Mask:255.255.255.0
          inet6 addr: fe80::20a:35ff:fe00:122/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:13974 errors:0 dropped:0 overruns:0 frame:0
          TX packets:483 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000 
          RX bytes:1115215 (1.1 MB)  TX bytes:110730 (110.7 KB)
          Interrupt:29 Base address:0xb000 

eth1      Link encap:Ethernet  HWaddr f6:bf:82:e6:89:3d  
          inet addr:10.0.111.182  Bcast:10.0.111.255  Mask:255.255.255.0
          inet6 addr: fe80::f4bf:82ff:fee6:893d/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:18483 errors:0 dropped:0 overruns:0 frame:0
          TX packets:2490 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000 
          RX bytes:2090444 (2.0 MB)  TX bytes:377472 (377.4 KB)
          Interrupt:30 Base address:0xc000 


HDMI Receiver

HDMI Transmitter

Audio Codec

USB

/ {
        usb_phy0: usb-phy0 {
                compatible = "usb-nop-xceiv";
                #phy-cells = <0>;
                view-port = <0x170>;
                drv-vbus;
        };
};

&usb0 {
        status = "okay";
        dr_mode = "host";
        usb-phy = <&usb_phy0>;
};


USB Hub

&i2c1 {
        status = "okay";
        clock-frequency = <100000>;

        usb2514b@2c {
                compatible = "microchip,usb2514b";
                reg = <0x2c>;
        };
};
[    4.488468] usb251xb 0-002c: Hub configuration was successful.
[    4.488484] usb251xb 0-002c: Hub probed successfully