Difference between revisions of "Main Page"
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* [[Device Tree]] | * [[Device Tree]] | ||
* [[SDSoC]] | * [[SDSoC]] | ||
| + | * [[The_Snickerdoodle_Book|The Snickerdoodle Book]] | ||
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== Resources == | == Resources == | ||
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* [https://github.com/krtkl/snickerdoodle-u-boot U-Boot source] | * [https://github.com/krtkl/snickerdoodle-u-boot U-Boot source] | ||
* [https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf Xilinx Zynq-7000 technical reference manual] | * [https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf Xilinx Zynq-7000 technical reference manual] | ||
| + | * [https://krtkl.com/resources/docs/ Schematics] | ||
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== Community == | == Community == | ||
Latest revision as of 06:34, 2 October 2020
snickerdoodle Board Specifications
| snickerdoodle | snickerdoodle one | snickerdoodle black | snickerdoodle prime LE | ||
|---|---|---|---|---|---|
| SoC Device | Z-7010-1C | Z-7020-3E | Z-7020-1C | ||
| Processing System | Processor | Dual-Core ARM Cortex-A9 MPCore | |||
| Processor Frequency | 667MHz | 866MHz | 667MHz | ||
| DRAM | 1GB @ 400MHz LPDDR2 | 512MB @ 400MHz LPDDR2 | 1GB @ 400MHz LPDDR2 | 512MB @ 400MHz LPDDR2 | |
| Wireless | 2.4GHz SISO 802.11b/g/n | 2.4GHz/5GHz MIMO 802.11a/b/g/n | 2.4GHz SISO 802.11b/g/n | ||
| Programmable Logic | Logic Cells | 28K | 85K | ||
| Look-Up Tables (LUTs) | 17 600 | 53 200 | |||
| Block RAM | 2.1Mb | 4.9Mb | |||
| DSP Slices | 80 | 220 | |||
| I/O Pins | 100 | 125 | |||
| Dimensions | Length x Width | 88.9mm x 50.8mm (3.5in x 2in) | |||
| Weight (Connectors Up) | 32.6g | 33.2g | |||
| Weight (Connectors Up) | 31.0g | 31.8g | |||
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